A six day Faculty Development Training Programme on CMOS Analog VLSI Design sponsored by Anna University, Chennai was organized by the Department of Electronics and Communication Engineering at Paavai College of Engineering. The programme scheduled from 09.12.2019 to 14.12.2019. Twenty six external faculties from various Engineering colleges in Tamil Nadu and two internal faculties have attended the programme. The FDTP was inaugurated with lightening of kuthuvilaku by Dr.M.Premkumar, Principal, Paavai Engineering College, Dr.P.Saravanan, Chief Guest, PSG College of Technology, Dr.R.Arangasamy, Principal, Paavai college of Engineering, Prof A.Immanuvel, Head of Department, ECE and various participants in this FDTP. The programme started on 09.12.2019 with a brief inaugural address by Dr.M.Premkumar, Principal, Paavai Engineering College. The keynote address was given by Dr.P.Saravanan, Speaker Guest, PSG College of Technology. He addressed participants to develop curriculum of their choice and also helped the participants to familiarize with the outcome based learning methodology. In the first technical session of the first day of the programme, Prof Dr.P.Saravanan, Department of ECE, PSG College of Technology, presented the title “CMOS IC design flow”. It focuses the design of modern analog ICs and the importance of CMOS Design flow. Mr.K.Sivanandam, Assistant professor, Department of ECE, KSR College of Technology presented the concept of analog designed MOS devices and basics of current mirror in after noon. In day 2 Dr.S.Vijayakumar, Department of ECE, Paavai Engineering College, Discussed the overview of Characteristics of Noise and its Types, Feedback Topologies and Effect of Feedback. In the next session Internal faculty, Mr.R.Manikandan, Associate professor, Department of ECE, Paavai College of Engineering delivered the analysis of single stage and multistage amplifier design. In day 3 Prof.P.N.Palanisamy, Assistant professor, Department of ECE, Mahendra College of Engineering, enlightened the characteristics of OP-Amp and design specifications. In the next session Prof.L.Punitha, Assistant professor, Department of ECE, Paavai Engineering College handled about the stability and frequency compensation techniques of OP-Amp. In day 4 Prof.S.Prabu Venkateswaran, Assistant professor, Department of ECE, SNS College of Technology, Focused on key features of Phase Locked Loop. In the next session Prof.C.Naveen, Assistant Professor, Department of ECE, Kongu College of Engineering demonstrated the concept of switched-capacitor and visualized the aspects of CMOS design using LabView. In day 5 Dr.K.Amudha, Department of ECE, Kongunadu College of Engineering and Technology delivered the fundamental concepts of Miller theorem and high frequency models of MOS transistors. In the next session Prof.R.Prabhu, Assistant Professor,Department of ECE, Gnanamani College of Technology, handled about Statistical Characteristics of Noise and its Types. In day 6 a test was conducted based on the FDTP and all the participants attended the test and after the completion of test answers were discussed. In the afternoon session participants shared their views about the FDTP and feedbacks about the six day FDTP.